Description:
The ATmega8L is a low-power CMOS 8-bit microcontroller based on the AVR® enhanced RISC architecture. By executing powerful instructions in a single clock cycle, the ATmega8L achieves throughputs close to 1 MIPS per MHz. This empowers system designers to optimize the device for power consumption versus processing speed.
The ATmega8A provides the following features: 8 KB of In-System Programmable Flash with ReadWhile-Write capabilities, 512 B of EEPROM, 1 KB of SRAM, 23 general purpose I/O lines, 32 general purpose working registers, three flexible timer/counters with compare modes, internal and external interrupts, a serial programmable USART, one byte oriented two-wire serial interface, a 6-channel ADC (eight channels in TQFP and QFN/MLF packages) with 10-bit accuracy, a programmable Watchdog timer with internal oscillator, an SPI serial port, and five software selectable power saving modes. The Idle
mode stops the CPU while allowing the SRAM, timer/counters, one SPI port, and interrupt system to continue functioning. The Power-down mode saves the register contents but freezes the oscillator, disabling all other chip functions until the next Interrupt or Hardware Reset. In Power-save mode, the asynchronous timer continues to run, allowing the user to maintain a timer base while the rest of the device is sleeping. The ADC Noise Reduction mode stops the CPU and all I/O modules except asynchronous timer and ADC, to minimize switching noise during ADC conversions. In Standby mode, the crystal/resonator oscillator is running while the rest of the device is sleeping. This allows very fast start-up combined with low-power consumption.
Application:
robotic
electronic devices
controller system
Features:
High-performance, Low-power AVR 8-bit Microcontroller
• Advanced RISC Architecture
– 130 powerful instructions - most single-clock cycle execution
– 32 x 8 general purpose working registers
– Fully static operation
– Up to 16 MIPS throughput at 16 MHz
– On-chip 2-cycle multiplier
• High Endurance Non-volatile Memory segments
– 8 KB of In-System Self-programmable Flash program memory
– 512B EEPROM
– 1 KB internal SRAM
– Write/erase cycles: 10,000 Flash/100,000 EEPROM
– Data retention: 20 years at 85°C/100 years at 25°C(1)
– Optional boot code section with independent lock bits
• In-system programming by on-chip boot program
• True read-while-write operation
– Programming lock for software security
• Microchip QTouch®
library support
– Capacitive touch buttons, sliders and wheels
– QTouch and QMatrix acquisition
– Up to 64 sense channels
• Peripheral Features
– Two 8-bit timer/counters with separate prescaler, one compare mode
– One 16-bit timer/counter with separate prescaler, compare mode, and capture mode
– Real-time counter with separate oscillator
– Three PWM channels
– 8-channel ADC in TQFP and QFN/MLF package
6-channel ADC in PDIP package
• Six channels 10-bit accuracy
– Byte-oriented two-wire serial interface
– Programmable serial USART
– Master/slave SPI serial interface
– Programmable watchdog timer with separate on-chip oscillator
– On-chip analog comparator
• Special Microcontroller Features
– Power-on Reset and programmable Brown-out Detection
– Internal calibrated RC oscillator
– External and internal interrupt sources
– Five sleep modes: Idle, ADC noise reduction, power-save, power-down, and standby
• I/O and Packages
– 23 programmable I/O lines
– 28-lead PDIP, 32-lead TQFP, and 32-pad QFN/MLF
• Operating Voltages
– 2.7 - 5.5V
• Speed Grades
– 0 - 16 MHz
• Power Consumption at 4 MHz, 3V, 25°C
– Active: 3.6 mA
– Idle mode: 1.0 mA
– Power-down mode: 0.5 μA