برد توسعه CH552G دارای ارتباط USB

CH552G-DEBD

5467-536-8756

70,750 تومان
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علاقه مندان : -
وضعیت : غیرفعال

تعداد مرجوعی : 0
دنبال کنندگان : -

قدمت : 4 سال و 9 ماه و 24 روز
وزن : 3 گرم

کل فروش : 5 عدد
تعداد سفارش ها : 2 سفارش

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برد توسعه CH552G دارای ارتباط USB

Description:
The CH552 chip is an enhanced E8051 core microcontroller compatible with the MCS51 instruction set. Its 79% instruction is a single-byte single-cycle instruction, and the average instruction speed is 8 to 15 times faster than the standard MCS51.
The CH552 supports up to 32MHz system clock speed, built-in 16K program memory ROM and 256 bytes internal iRAM and 1K bytes of on-chip xRAM. xRAM supports DMA direct memory access.
CH552 has built-in ADC analog-to-digital conversion, touch button capacitance detection, 3 groups of timers and signal capture and PWM, dual asynchronous serial port, SPI, USB device controller and full-speed transceiver, USB type-C and other functional modules.

Features:
Enhanced E8051 core CPU, 8-15 times faster than the standard MCS51, special XRAM data fast copy instructions;
Built-in 16KB Code Flash, 1KB XRAM and internal 256B iRAM, 128B DataFlash, support byte mode read and write;
Built-in 2KB BootLoader, support USB and serial ISP, provide ISP download library;
Embedded USB controller and USB transceiver, support USB-Device device mode, support USB type-C master-slave detection, support USB 2.0 full speed 12Mbps or low speed 1.5Mbps. Supports up to 64 bytes of data packets, built-in FIFO, and supports DMA;
Embedded USB controller and USB transceiver support USB2.0 full speed and low speed host or device mode. Supports up to 64 bytes of data packets, built-in FIFO, and supports DMA;
Provide 3 groups of timers/counters, support 2 channels of signal capture and 2 channels of PWM output;
Provide 3 groups of timers/counters, support 2 channels of signal capture and 2 channels of PWM output;
Provide 2 full-duplex asynchronous serial ports, all support high baud rate communication, UART0 is standard MCS51 serial port;
Provide 1 SPI communication interface, built-in FIFO, support Master/Slave master-slave mode;
Provide 4-channel 8-bit A/D analog-to-digital converter to support voltage comparison;
Support 6-channel capacitance detection, support up to 15 touch buttons, support independent timing interrupt;
Support 4 kinds of reset signal sources, built-in power-on reset, support software and watchdog overflow reset, optional external pin reset;
Built-in 24MHz clock source and PLL, external crystal can be supported by multiplexing GPIO pins;
Built-in 5V to 3.3V low dropout voltage regulator, supporting 5V or 3.3V or even 2.8V supply voltage. Support low-power sleep, support USB, UART0, UART1, SPI0 and some GPIO external wake-up